Intellectual property (IP) blocks are reference circuit designs that can be implemented on a programmable logic device (PLD) to perform functions that are defined by the IP block. The IP blocks can be programmed into the programmable logic device using an electronic design automated (EDA) tool.
Each intellectual property block may include a configuration and status register block (sometimes referred to as a configuration status register or CSR block). The configuration and status register block enables runtime configuration of the intellectual property block. In addition, the configuration and status register block enables a user to read back statuses of operations within the intellectual property block.
However, the configuration and status register block may at times be as large as an intellectual property block. This is because the size of the configuration and status register block depends on the runtime features of the IP block. The configuration and status register blocks that are offered by most companies are designed to provide all of the available runtime features and read back all of the available statuses of the IP block. However, only certain runtime features of the CSR block are used by the users (i.e., only a portion of CSR block is used). The remaining portions of the configuration and status register block, therefore, are redundant at least for that user.